Skip to main content

A Comparative Analysis Report on Modified Reversible Sequential Circuits realized with Improved Quantum cost


Volume 7 Issue 1 December - February 2019
Research Paper
Gopi Chand Naguboina*, T. Sravya**
* Assistant Professor, Department of Electronics and Communication Engineering, MaharajVijayaramGajapathi Raj (MVGR) College of Engineering (Autonomous), Vizianagaram, Andhra Pradesh, India.
** PG Scholar, Department of Electrical and Electronics Engineering, Sri PadmavatiMahilaVisvavidyalayam, Tirupati, Andhra Pradesh, India.
Naguboina, G. C., and Sravya, T. (2019). Transient Dynamic Finite Element Analysis of Cup Drawing Process. i-manager's Journal on Circuits and Systems , 7(1), 37-50. https://doi.org/10.26634/jcir.7.1.15243
Abstract
Reversible Logic is the dominating field of research in low power VLSI. In recent times, reversible logic has gained special attention in order to reduce power consumption mainly in concern to digital logic design. The main aim of this paper is to give an overall summary report on Digital sequential circuits like Shift registers and Counters designed using reversible logical computation. Digital circuits are the circuits implemented using Boolean logical expressions. Digital circuits find many applications in present daily life. Different types of combinational and sequential circuits are designed using reversible logic to reduce power dissipation. A Boolean function f(i1, i2, i3,……, in) having 'n' inputs and 'm' outputs is said to be logically reversible if the number of inputs are equal to the number of outputs (i.e. n = m) and the input pattern maps uniquely to the output pattern. Few reversible logic gates present in the literature are NOT gate, Feynman Gate (CNOT gate), Double Feynman Gate, Peres Gate, TR gate, Seynman Gate, etc. The reversible gate must run both forward and backward directions such that the inputs can be retrieved with the knowledge of outputs. Reversible Logic has applications in various fields like Quantum Computing, Optical Computing, Nano-technology, Computer Graphics, low power VLSI, etc. Reversible logic has gained essence in recent years largely due to its property of low power consumption and low heat dissipation. Till date in the literature, universal shift register and shift counters are realized using reversible logical computation for the first time in this paper. In this paper, a summary report is given on Sequential circuits like Shift registers and Counters designed using reversible logical computation with improved quantum cost. A comparative study on reversible and irreversible sequential logical circuits is also given. The realized reversible logical circuits are analysed in terms of quantum cost, garbage outputs, number of gates, and propagation delay. The circuits have been designed and simulated using Xilinx software.

Comments

Popular posts from this blog

Continuous Overvoltage Characteristics of Surge Protected Power Strips

Volume 5 Issue 4 September - November 2017 Research Paper Continuous Overvoltage Characteristics of Surge Protected Power Strips Cengiz Polat* Assistant Professor, Department of Electrical and Electronics Engineering, Istanbul University, Istanbul, Turkey. Uzunoglu, C. P. (2017). Continuous Over Voltage Characteristics of Surge Protected Power Strips.  i-manager’s Journal on Circuits and Systems,  5(4), 1-7.  https://doi.org/10.26634/jcir.5.4.13938 Abstract Increasing applications of constantly developing electronic devices require delicate voltage and current protection. Although the electrical network is monitored continuously, undesired over currents and over voltages may occur on the distribution system due to failures. Most of the electronic switch gear is connected via surge protected power strips in indoor applications, where current protection is vital. Surge protected power strips are usually manufactured based on Metal Oxide Varistors (MOVs) ...

Reduced Wirelength-Based Low Power Performance of Multibit Flip-Flop

Volume 1 Issue 4 September - November 2013 Research Paper Reduced Wirelength-Based Low Power Performance of Multibit Flip-Flop M.Karthick*, S. Vijayakumar** *PG Scholar, Department of Electronics and Communication Engineering, Paavai Engineering College, Namakkal, India. **Associate Professor, Department of Electronics and Communication Engineering, Paavai Engineering College, Namakkal, India. Karthick, M. and Vijayakumar, S. (2013). Reduced Wire length-Based Low Power Performance Of Multibit Flip-Flop.  i-manager’s Journal on Circuits and Systems , 1(4), 22-26.  https://doi.org/10.26634/jcir.1.4.2593 Abstract Power reduction is a main parameter to design VLSI circuits. In this paper, to design a number of D-flip flop performing at the same time, the given clock signal is reduced using multi bit flip-flop. The multi bit flip flop is mainly used to improve the clock power for the given common clock signal and to reduce the switching power. This method is p...

A Review on Control strategies for LFC in Deregulated Scenario

Volume 1 Issue 1 December - February 2013 Review Paper A Review on Control strategies for LFC in Deregulated Scenario T. Anilkumar*, N. Venkata ramana** * Associate Professor, EEE Department, ACE Engineering College, Ghatkesar, Hyderabad, AP, India. ** Professor and Head of Deportment, EEE Department, JNTU Mantini, AP, India. Kumar, T. A., and Ramana, N., (2013). A Review On Control Strategies For LFC In Deregulated Scenario.  i-manager’s Journal on Circuits and Systems , 1(1), 27-36.  https://doi.org/10.26634/jcir.1.1.2197 Abstract In power system studies, Load frequency control is an important issue to supply sufficient and reliable electric power with good quality. The main objective of LFC is to maintain load frequency and tie-line power flow within permissible limits by adjusting megawatt output of LFC generators, so as to accommodate fluctuating load demands. This paper presents a brief review of different control techniques to researchers on design...