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Electromigration – A Brief Survey


Volume 5 Issue 3 June - August 2017 
Survey Paper
Electromigration – A Brief Survey
Satigouda Patil*, H. P. Rajani**
* Research Scholar, VTU, Belgaum, India
** Professor, Department of Electronics and Communication Engineering, KLESCET, Belagavi, India.
PATIL, S., and Rajani, H. P. (2017). Electromigration – A Brief Survey. i-manager’s Journal on Circuits and Systems, 5(3), 31-37.https://doi.org/10.26634/jcir.5.3.13814
Abstract
As the feature size shrinks, Electromigration (EM) becomes a more critical reliability issue in IC design. EM around the via structures account for much of the reliability problems in ICs [13]. Electromigration is increasingly relevant to physical design of the electronic circuits. It is caused by excess current density stress in the interconnect. The ongoing reduction of the circuit feature sizes has aggravated the problem over last couple of years. It is therefore an important reliability issue to consider electromigration-related design parameters during physical design as life-span of the chip is defined by how well EM verification is done for that chip. So EM is a very important check to be taken care in reliability checks. Literature deals with different aspect of EM in [1], [2], [10], [21], and [22]. In this paper, an effort is made to review different aspects of EM, solution proposed and scope for improvement. The authors have reviewed and identified various fascinating issues and possible solutions to address them.

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