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A Novel Implementation of Logic Gates Design Using High Electron Mobility Transistor


Research Paper
A Novel Implementation of Logic Gates Design Using High Electron Mobility Transistor
V. Ganesan*
Assistant Professor, Department of Electronics and Telecommunication Engineering, Sathyabama University, Chennai, India.
Ganesan, V. (2015). A Novel Implementation of Logic Gates Design Using High Electron Mobility Transistor. i-manager’s Journal on Circuits and Systems, 3(2), 14-18. https://doi.org/10.26634/jcir.3.2.3410
Abstract
The next generation of logic gate devices is expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing MOS technology. The high electron mobility transistor (HEMT) should ideally be the best device to work for high performance VLSI circuit design. This paper enumerates the design of high speed logic gates NOR, NAND, and NOT using AlGaN/GaN high electron mobility transistor (HEMT). This high electron mobility transistor is a novel device that is projected to outperform scaled CMOS technologies. The high electron mobility transistor based devices offers high mobility, high carrier velocity for fast switching. The p-type or n-type switching behavior depends upon the polarity gate voltage. The logic gates are designed by TTL logic, so the power consumption is less in this logic gates. It can be efficiently used in VLSI ICs. PSPICE simulations have been performed on the logic gates designed using both these technologies and their output behaviors have been extensively studied at different supply voltages keeping the designs at room temperature. The performances are evaluated in terms of power, delay and PDP to show that it is possible to reduce the delay and power consumption of the logic gates by replacing the CMOS transistors of the design with the emerging high electron mobility transistor(HEMT). The simulation results of the proposed logic gates appear to have better speed of operation. It can be suitable for SPICE simulation of hybrid digital Ics.

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