Skip to main content

Micro Hydro Power Familiarizing System Stand-In as a Smart Grid Pack ProposedFor Energy Depletion

Volume 5 Issue 2 March - May 2017

Research Paper

Micro Hydro Power Familiarizing System Stand-In as a Smart Grid Pack ProposedFor Energy Depletion

Ch. Venkateswara Rao*, S. S. Tulasi Ram**, B. Brahmaiah***
* Professor, Department of Electrical and Electronics Engineering, Gandhi Institute of Engineering and Technology, Gunupur, Odisha, India.
** Professor, Department of Electrical and Electronics Engineering, Jawaharlal Nehru Technological University, Hyderabad, India.
*** Principal, Sri Vasavi Engineering College, Tadepalligudem, India.
Rao, Ch. V., Tulasiram, S. S., Brahmaiah, B. (2017). Micro Hydro Power Familiarizing System Stand-In as a Smart Grid Pack Proposed For Energy Depletion. i-manager’s Journal on Circuits and Systems, 5(2), 29-40.https://doi.org/10.26634/jcir.5.2.13663

Abstract


The Hydroelectric power is generated by the rotating turbine through high pressure falling water that drives the generator. So far as electricity production is concerned, hydro-power is the most established and popular renewable resource. As a matter of fact, hydro-turbines have a very quick response for power generation and thus they are capable of handling the load variations. Besides, these can be directly connected to the grid. Among the renewable sources, Micro Hydro Power (MHP) is attractive because of its mature technology, spallation cheap cost, minimum civil work, manageable technology which is robust and reliable that it is applied for controller, generator, and turbine technologies. In this paper, a 60 KW, 132 KV synchronous generator with two controllers are designed and simulated to control the mechanical power input and another controller for controlling the excitation of synchronous generator and synchronous generator output at 13.8 KV is fed to load of 2 KW at 13.8 KV and then this 13.8 KV is stepped down to 400 V to feed the loads of 10 KW and 50 KW. Here 10 KW load is connected through the breaker, to provide load variations and 50 KW load of fixed type.

Comments

Popular posts from this blog

Fuzzy Based Power Quality Improvement In Grid Connected Microgrid At The Distribution Level

Volume 1 Issue 2 March - May 2013 Research Paper Fuzzy Based Power Quality Improvement In Grid Connected Microgrid At The Distribution Level Naveen Bolisetti*, Mothiram Bhukya** * Department of Electrical and Electronics Engineering, SRKR Engineering college, Bhimavaram, Andhra Pradesh, INDIA. ** Department of Electrical and Electronics Engineering, SRKR Engineering college, Bhimavaram, Andhra Pradesh, INDIA. Bolisetti, N., and Ram, M. B. (2013). Fuzzy Based Power Quality Improvement In Grid Connected Microgrid at the Distribution Level.  i-manager’s Journal on Circuits and Systems , 1(2), 1-6.  https://doi.org/10.26634/jcir.1.2.2288 Abstract This paper suggests a new control strategy that consists of a grid interfaced four leg inverter control system using adaptive fuzzy controller for a 3-phase 4-wire distribution system that is capable of simultaneously compensating problems like power factor, current imbalance and current harmonics, and also of inject...

Design and Implementation of Low Power ALU Using 8T Full Adder with FinFETs

Volume 5 Issue 4 September - November 2017 Research Paper Design and Implementation of Low Power ALU Using 8T Full Adder with FinFETs M. Chandra Sekhar Reddy*, P. Ramana Reddy** * Research Scholar, Department of Electronics and Communication Engineering, JNTUA, Anantapuramu, Andhra Pradesh, India. ** Professor, Department of Electronics and Communication Engineering, JNTUACEA, Anantapuramu, Andhra Pradesh, India. Reddy, M. C. S., and Reddy, P. R. (2017). Design and Implementation of Low Power ALU Using 8T Full Adder with FINFETS.  i-manager’s Journal on Circuits and Systems , 5(4), 8-14.  https://doi.org/10.26634/jcir.5.4.13939 Abstract An Arithmetic and Logic Unit (ALU) is an advanced circuit that performs number-crunching and rationale operations. ALU is an essential building piece of the focal preparing unit of a PC. The power, devoured by the ALU has a direct effect on the power disseminated from the processor. Thus, a plan is required to execute the ...

Power Efficient Functional Units for High Speed Computations

Research Paper Power Efficient Functional Units for High Speed Computations B. Dinesh*, R. Jagadeesh**, M. Kathirvelu*** *,** PG Students, Department of ECE, KPR Institute of Engineering and Technology, Coimbatore, Tamil Nadu, India. *** HOD & Professor, Department of Electronics and Communication, KPR Institute of Engineering and Technology, Coimbatore, Tamil Nadu. Dinesh, B. Jagadeesh, R. and Kathirvelu, M. (2013). Power Efficient Functional Units For High Speed Computations.  i-manager’s Journal on Circuits and Systems , 1(3), 13-18.  https://doi.org/10.26634/jcir.1.3.2443 Abstract Power consumed per unit switching activity in a CMOS based computational unit is greatly dependent on the power consumption of the sum and carry generation units. This paper is focussed on reducing area and PDP of the computational units through gate level and transistor level optimisation. At transistor level 6T Mux based CMOS-CPL XOR gates with stable rise and fall times ar...