Volume 1 Issue 3 June - August 2013
Research Paper
GuangleiAn*, Chris Hutchens**,
Robert.L.Renneker II***
* PhD Student, MSVLSI Laboratory,
School of Electrical and Computer Engineering, Oklahoma State University,
Stillwater, Oklahoma.
** MSVLSI Laboratory, School of
Electrical and Computer Engineering, Oklahoma State University, Stillwater,
Oklahoma.
*** Department of Behavioral and
Brain Sciences, Erik Jonsson School of Engineering, University of Texas at
Dallas, Richardson, Texas.
GuangleiAn, Hutchens, C., and
Renneker II, R. L. (2013). Two Stage Power Optimized Implantable Neural
Amplifier Based On Cascoded Structures. i-manager’s Journal on Circuits
and Systems, 1(3), 1-7. https://doi.org/10.26634/jcir.1.3.2441
Abstract
A low power, low
noise of the two stage neural amplifier used in an intelligent Radio-Frequency
Identification (RFID) based on folded cascode Operational Transconductance
Amplifier (OTA) is presented. The optimization of the number of amplifier
stages are discussed to achieve the minimum power and area consumption. The
amplifier was submitted for fabrication in a 0.18 μm CMOS process. The
amplifier power supply is 0.7V. The midband gain of amplifier is 58.4dB with a
3dB bandwidth from 0.71 to 8.26 kHz. Measured input-referred noise and total
power consumption are 20.7μV rms and 1.90 μW respectively. The measured result
shows that optimizing the number of stages can achieve lower power consumption
and demonstrates the neural amplifier's suitability for instu neutral activity
recording.
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