Skip to main content

Comparative Study of Modelling Techniques for Transformerless Three Phase NPC Inverter to Eliminate Harmonic in PV System

Volume 4 Issue 3 June - August 2016

Research Paper

Comparative Study of Modelling Techniques for Transformerless Three Phase NPC Inverter to Eliminate Harmonic in PV System

Romi Choudhary*, A.N. Tiwari**
* PG Scholar, Department of Electrical Engineering, MMMUT, Gorakhpur, Uttar Pradesh, India.
** Associate Professor, Department of Electrical Engineering, MMMUT, Gorakhpur, Uttar Pradesh, India.
Choudhary, R., and Tiwari, A.N. (2016). Comparative Study of Modelling Techniques for Transformerless Three Phase NPC Inverter to Eliminate Harmonic in PV System. i-manager’s Journal on Circuits and Systems, 4(3), 15-23.https://doi.org/10.26634/jcir.4.3.8220

Abstract


The main objective of this paper is the proposal of new modulation techniques for three phase transformerless neutral point clamped inverters to eliminate harmonics in photovoltaic systems without requiring any modification on the multilevel inverter or any additional hardware. The modulation techniques are capable of reducing the harmonics in photovoltaic systems by applying PWM (Pulse Width Modulation) and SVPWM (Space Vector Pulse Width Modulation) or converter. A multilevel power conversion concept is based on the combination of Neutral-Point -Clamped (NPC) and floating capacitor converters. In the proposed scheme, the voltage balancing across the floating capacitors is achieved by using a proper selection of redundant switching states, the input source is PV System. The output voltage waveforms in neutral point clamped inverters can be generated at low switching frequency losses with high efficiency and low distortions. This paper presents the switching pattern to generate symmetrical gating signal to control NPCVSI (Neutral Point Clamp Voltage Source Inverter) using matlab/simulink.

Comments

Post a Comment

Popular posts from this blog

An improved Multilevel Inverter with Lesser Number of Switches for An Induction Motor Drive

Volume 2 Issue 1 December - February 2014 Research Paper An improved Multilevel Inverter with Lesser Number of Switches for An Induction Motor Drive Ayyappa Srinivasan M G*, Nirmal Singh** *Assistant Professor, Department of Electrical and Electronics Engineering, St.Mother Theresa Engineering College, Tuticorin, India. **Professor, Department of Electronics and Communication Engineering, V.V. College of Engineering, Tisayanvilai, India Srinivasan, A.M.G and Singh, N. N (2014). An Improved Multilevel Inverter With Lesser Number of Switches for an Induction Motor Drive.  i-manager’s Journal on Circuits and Systems , 2(1), 7-14.  https://doi.org/10.26634/jcir.2.1.2783 Abstract An improved three level inverter scheme, with less number of switches, having the features of common mode voltage elimination, DC link capacitor voltage balancing, and minimization and equalization of voltage stress across the switches, for an open end winding induction motor drive, h...
Post a Comment
Read more

Reduced Wirelength-Based Low Power Performance of Multibit Flip-Flop

Volume 1 Issue 4 September - November 2013 Research Paper Reduced Wirelength-Based Low Power Performance of Multibit Flip-Flop M.Karthick*, S. Vijayakumar** *PG Scholar, Department of Electronics and Communication Engineering, Paavai Engineering College, Namakkal, India. **Associate Professor, Department of Electronics and Communication Engineering, Paavai Engineering College, Namakkal, India. Karthick, M. and Vijayakumar, S. (2013). Reduced Wire length-Based Low Power Performance Of Multibit Flip-Flop.  i-manager’s Journal on Circuits and Systems , 1(4), 22-26.  https://doi.org/10.26634/jcir.1.4.2593 Abstract Power reduction is a main parameter to design VLSI circuits. In this paper, to design a number of D-flip flop performing at the same time, the given clock signal is reduced using multi bit flip-flop. The multi bit flip flop is mainly used to improve the clock power for the given common clock signal and to reduce the switching power. This method is p...
Post a Comment
Read more

Fuzzy Logiccontrol Of Differential Protection For Large Power Transformer

Volume 1 Issue 1 December - February 2013 Research Paper Fuzzy Logiccontrol Of Differential Protection For Large Power Transformer S.Padmini*, Subransu Sekhar Dash**, S. Chandrasekhar***, Priyanka Vedula**** * Assistant Professor, SRM University. ** Professor and Head, Department of EEE, SRM University, Shruti. ***-**** B. Tech Student, SRM University. Padmini, S., Dash, S. S., Chandrasekhar, S. and Vedula, P. (2013). Fuzzy Logiccontrol Of Differential Protection For Large Power Transformer.  i-manager’s Journal on Circuits and Systems , 1(1), 10-15.  https://doi.org/10.26634/jcir.1.1.2194 Abstract Advances Differential prot ecti on system is us e d t o protect most of the power transformers in power systems. The protection system is based on the differential currents/voltages of the primary an d secondary of the transformers under fault conditions and under normal operating conditions. The inrus currents or the magnetizing currents are generated in the...
Post a Comment
Read more