Volume 5 Issue 4 September - November 2017 Research Paper Design and Implementation of Low Power ALU Using 8T Full Adder with FinFETs M. Chandra Sekhar Reddy*, P. Ramana Reddy** * Research Scholar, Department of Electronics and Communication Engineering, JNTUA, Anantapuramu, Andhra Pradesh, India. ** Professor, Department of Electronics and Communication Engineering, JNTUACEA, Anantapuramu, Andhra Pradesh, India. Reddy, M. C. S., and Reddy, P. R. (2017). Design and Implementation of Low Power ALU Using 8T Full Adder with FINFETS. i-manager’s Journal on Circuits and Systems , 5(4), 8-14. https://doi.org/10.26634/jcir.5.4.13939 Abstract An Arithmetic and Logic Unit (ALU) is an advanced circuit that performs number-crunching and rationale operations. ALU is an essential building piece of the focal preparing unit of a PC. The power, devoured by the ALU has a direct effect on the power disseminated from the processor. Thus, a plan is required to execute the ...
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